Building SDRAM Controller in Verilog from Scratch
Published 4/2025
MP4 | Video: h264, 1280×720 | Audio: AAC, 44.1 KHz, 2 Ch
Using Vivado 2024
What you’ll learn
Architecture of 3rd Gen SDRAM memories
Building Initialization, Write, Read modules from scratch
Building Self refresh & Auto refresh modules
Mode Register usage & Understanding Write and Read transactions of SDRAM
Use Micron SDRAM model to test codes
Requirements
Fundamentals of Digital Electronics and Verilog
Description
Who this course is for
Anyone wish to work with modern memories.
