SynThesis-STA-Physical Design(PD):Cadence+Synopsys Tool flow


SynThesis-STA-Physical Design(PD):Cadence+Synopsys Tool flow
Synthesis-STA-Physical Design(PD):Cadence+Synopsys Tool flow
MP4 | Video: h264, 1920×1080 | Audio: AAC, 44.1 KHz

ASIC flow, Synthesis, STA, Physical Design – Cadence Genus, Tempus, Innovus tool flow & Synopsys ICC2 tool flow

What you’ll learn
ASIC Flow in brief
Logical Synthesis vs Physical Synthesis
Timing Concepts, definitions
Static Timing Analysis (STA)
Timing paths, Contraints, modes
Synthesis example execution with Genus tool
STA example execution with Tempus tool
Physical design flow using Innovus tool
Floorplan
Placement
Clock Tree Synthesis (CTS)
Routing

Requirements
Basics of RTL design using Verilog
Digital Fundamentals
Verilog Language

Description
Who this course is for:
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